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Computer Organization & Architercture

  • Code: 5303
  • Semester: 3rd
  • Type: Scientific Field Course (SFC)
  • Category: Special Background Course (SBC)
  • Character: Compulsory (C)

Module Description

I..Aim of the course…
This subject is designed to provide students with an introductory but comprehensive knowledge on computer systems, computer organization, computer system architecture and assembly language programming. System architecture refers to those characteristics that have immediate effect on the logic execution of a program and organization refers to the functional units and their interconnections that perform the specifications set by architecture.
II…Structure of the course…
The course is made of three main topics. The first topic examines the technological evolution of computer systems and discusses the classical von Newmann architecture and various performance assessment methods and criteria . The second topic deals with the components of a computer system, their interconnection, the exchange of signals and data between them and their operation. The third subject area deals with the presentation of an assembly language and its use to writing application and system programs .
III..The outline of the course is:
Introduction: Organization and Architecture. Structure and Function.
Computer Evolution and Performance : A Brief History of Computers. Designing for Performance .The Evolution of the Intel x86 Architecture. Embedded Systems and the Arm. Performance Assessment.
Computer System: A Top-Level View of Computer Function and Interconnection: Computer Components. Computer Function. Interconnection Structures Bus Interconnection. PCI Bus.
CacheMemory: Computer Memory System Overview. Cache Memory Principles. Elements of Cache Design. Pentium 4 Cache Organization. Arm Cache Organization. Recommended Reading.
Internal Memory: Semiconductor Main Memory. Error Correction. Advanced Dram Organization.
External Memory : Magnetic Disk. Raid. Solid State Drives. Optical Memory. Magnetic Tape.
Input/Output : External Devices. I/O Modules. Programmed I/O. Interrupt-Driven I/O. Direct Memory Access. I/O Channels and Processors.The External Interface Firewire and Infiniband.
Lab sessions: Assembly for 8086 processor. Characteristics and Operation. Instruction forms. Addressing forms. Programming.
IV… Student Evaluation Method..
A… THEORETICAL PART (Autonomous)
a) Mid Term Test for 30% of Total Grade.
Multiple choice exam.
b) Final Exam for 70% of Total Grade
The exam paper may consist of questions on ;
* descreptive short formats.
* comparative evaluation of various theoretical aspects.
* detailed description of cash memory algorithms, design of a particular memory chip.
B… PRACTICAL PART (Autonomous)
a) Midterm Exam for 20% of Total Grade.
Examined : Very simple programs in Assemly 8086. Conditional Logic is mainly required.
b)Final Exam for 80% of Total grade.
Examined: Programs in Assembly 8086. More complex problems are considered where the use of subroutines is required, call by value, reference, recursive loops using stack pointers etc.
Final Grade = 60%*Grade(Theory) + 40%*Grade(Practical)

Alternative Evaluation Methods

Reading Course, Undertaking Assignments and Pojects, Oral Exams

Module Objectives

Upon successful completion of the course the students must be able to :
• to understand the concepts of architecture, organization and the basic operations of a computer system.
• has learned the structure of the simple and classical computer system IAS (Von Newmann) and the technological evolution of the processors as well as basic performance criteria.
• is able to use the structure of the experimental computer (IAS) to form simple programs and to follow by hand their execution on IAS.
• to apply the operations of the processor and memory ie the fetch execute cycle in order to execute these simple programs.
• has understand the operation of interrupts and their influence to the fetch execute cycle.
• has learned the structure and the operation of the buses.
• has understood the structure, the importance and the operation of cash memory and is in a position to calculate parameters for cash memories according to a specific memory-mapping algorithm.
• to understand the structure and operation of random access memory chips and is in a position to design a synchronous DRAM of a certain capacity.
• to understand the methodology behind the RAID technology for disk systems.
• to know the architecture of the computer I/O subsystem, their basic techniques and understand the operation of some known examples (Firewire).
• to form programs in the 8086 Assembly language for low level applications and thus to get a good understanding of the computer subsystems operation.
• in general, to acquire a sound background of knowledge needed in other more complicated subjects such as operating systems and parallel and advanced computer architectures.

Bibliography

1. Computer Organization and Architecture : Designing for Performance, Stallings William , 8th edition/2012, ISBN : 978-960-418-328-9
2. Structured Computer Organization, Andrew S. Tanenbaum, 4η edition / 2000, ISBN : 960-209-403-6
3. Computer Architecture, A Quantitative Approach, Hennessy John L.,Patterson David A, 3rd edition/ 2006, ISBN : 978-960-418-076-9
4. Computer Architecture : The 8086 Processor, Ellinas I.N., Kenterlis P. D., 1st edition /2008, ISBN : 978-960-930-663-8 (Greek)
5. Computer Architecture & Programming in Assembly, P. M. Papazoglou , 1st edition /2011, ISBN : 978-960-933-118-0

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